请教我的这段代码在 END PROCESS附近总是报错,是怎么回事?
请教我的这段代码在 END PROCESS附近总是报错,是怎么回事?
Library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity led_test is
PORT(
sys_clk: in STD_LOGIC;--50M系统时钟输入
rst_n: out STD_LOGIC;--复位信号输入
LED: out STD_LOGIC_VECTOR(3 DOWNTO 0)--LED灯闪动信号输出
);
END led_test;
ARCHITECTURE Behavioral OF led_test IS
SIGNAL led_delay: STD_LOGIC_VECTOR(28 DOWNTO 0);--延时计数器,对50M时钟分频
BEGIN
PROCESS(sys_clk,rst_n)
BEGIN
IF rst_n='0' THEN --复位,对led_delay清零
led_delay<=(OTHERS=>'0');
ELSIF sys_clk'EVENT AND sys_clk='1' THEN--时钟上升沿,led_delay加一
led_delay<=led_delay+1;
END_IF;
END PROCESS;
END
LED<=led_delay(28 DOWNTO 25);--分频器的高位作为LED灯闪动信号输出
end Behavioral;
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