quartus实现移位,以下是代码实现32-24的移位,想请教一下always块中是怎么实现,作仿真出不了结果

module shiftc1(clk,in,out);
input clk;
input signed [33:0] in;
output reg signed [24:0] out;

wire signed [32:0] c1ud;
wire signed [32:0] c1ud_rev;

assign c1ud=in[32:0];
assign c1ud_rev=-c1ud;


always@(posedge clk)
begin

out<=(c1ud[32]==0)?((c1ud[14]==1)?((c1ud>>15)+1):(c1ud>>15)): ((c1ud_rev[14]==1)?(-((c1ud_rev>>15)+1)): (-(c1ud_rev>>15)) );
end
endmodule
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