错误(175005):找不到位置:OCT_CAL_BLOCK_ID为[n](受影响的1个位置)

在Quartus®Prime软件中,在编译面向Arria®10器件的设计时,您可能会看到以下fitter错误消息

Error(14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 pin(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.

Error(175020): The Fitter cannot place logic pin in region (x, y) to (x, y), to which it is constrained, because there are no valid locations in the region for logic of this type.

Info(14596): Information about the failing component(s):

Info(175028): The pin name(s): <pin name>

Error(16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below:

Error(175005): Could not find a location with: OCT_CAL_BLOCK_ID of [n] (1 location affected)

Info(175029): <Pin number>

Info(175015): The I/O pad <pin name> is constrained to the location <Pin number> due to: User Location Constraints (<Pin number>)

Info(14709): The constrained I/O pad is contained within this pin

如果引脚位于3V I / O Bank中,则可能会发生这种情况。 3V I / O Bank仅支持OCT而无需校准。

有关哪些bank是3V I / O以及哪些是LVDS的详细信息,请参阅Arria 10核心结构和通用I / O手册,第5.4.1节

解决/修复方法

要避免此错误,请将引脚移至LVDS Bank或​​使用OCT而不进行校准。

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提问于 2018-08-02 13:55:34 +0800

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